HARDWARE SECTION
The hardware section divided into two units,
Ø Processing unit
Ø Monitoring uni
PROCESSING UNIT
ARM (ADVANCED RISC MACHINE
A microcontroller is a computer-on-a-chip or a single-chip computer. The word ‘MICRO’ suggests that the device is small and the word ‘Controller’ suggests that the device can be used to control the objects, processors or events. Another term to describe a microcontroller is embedded controller [5]. This is because the microcontroller and its support circuits are often built into or embedded in the devices they control.
Microcontrollers are being widely used in most of the fields. Any device that measure, store, controls, calculates or display information is a candidate for putting a microcontroller inside. In desktop computer, you can find microcontroller inside keyboards, modems, printers and other peripherals. A microcontroller is similar to a microprocessor inside a personal computer. Both microprocessor and microcontroller contain a CPU.
IMPLEMENTATION
The signals obtained from the sensors are amplified and are fed to the microcontroller [5]. The clock frequency of the microcontroller used here is 12MHZ.the microcontroller analyses these signals based on the software programs written in it. After analysis, the appropriate controlling action is taken by the microcontroller.
INTRODUCTION OF ARM
Arm processors have merits of high performance low power consumption, low cost, etc. arm processors are the most widely used microprocessors amongst the 32 bit and 64 bit microprocessors.
At the time when ARM7 system architecture was just been accepted and applied, the embedded microprocessor market was overwhelmingly occupied by 8-bit and 16-bit microprocessors. However these microprocessors can’t meet the requirements of developing high-end applications such as mobile phones, modems, etc. These high-end products needed the 32-bit microprocessors processing power and higher programming code density then the 16-bit CISC processors [5]. In order to meet these requirements, a T variety of ARM architecture was developed. This T variety is called 16-bit Thumb instruction set. Thumb technology is one of the best characteristics of ARM technology. The 32-bit processors can be run with 16-bit Thumb instruction set. So, thumb is a bridge between the 16-bit older system and the 32-bit new system.
ARM architecture provided higher performance processor solution the users who were looking for higher performance processors. These features greatly increased the embedded development as well as ARM technology. The 16-bit microprocessors were not developed as people expected. The reason was complicated. Maybe one of the reasons was that the 32-bit ARM processors provided higher performance and lower price than the 16-bit processors and enabled the high-end embedded applications to jump to the new 32-bit generation [5].
The ARM is a 32-bit Reduced Instruction Set Computer (RISC) instruction set architecture (ISA) developed by ARM Limited. It was known as the Advanced RISC Machine, and before that as the Acorn RISC Machine. The ARM architecture is the most widely used 32-bit ISA in terms of numbers produced. They were originally conceived as a processor for desktop personal computers by Acorn Computers, a market now dominated by the x 86 families by Intel and AMD. The relative simplicity of ARM processors made them suitable for low power applications. This has made them dominant in the mobile and embedded electronics market as relatively low cost and small microprocessors and micro-controllers.
ARM7TDMI is a core processor module embedded in many ARM 7 microprocessors including LPC2148. The ARM7TDMI core is a 32-bit embedded RISC processor. Its simplicity results in a high instruction throughput and impressive real-time interrupt response from a small and cost-effective processor core [6].
ARM LPC2148 FEATURES
16/32-bit ARM7TDMI-S microcontroller in a tiny 64 package.
• 8 to 40 kB of on-chip static RAM and 32 to 512 kB of on-chip flash program memory [6].
• 128 bit wide interface/accelerator enables high speed 60 MHz operation.
• In-System/In-Application Programming (ISP/IAP) via on-chip boot-loader software.
• Single flash sector or full chip erase in 400 ms and programming of 256 bytes in 1 ms.
• Embedded ICE RT and Embedded Trace interfaces offer real-time debugging with the on-chip Real Monitor software and high speed tracing of instruction execution.
• USB 2.0 Full Speed compliant Device Controller with 2 kB of endpoint RAM.
• In addition, the LPC2146/8 provides 8 kB of on-chip RAM accessible to USB by DMA.
• One or two (LPC2141/2 vs. LPC2144/6/8) 10-bit A/D converters provide a total of 6/14
• Analog inputs, with conversion times as low as 2.44 µs per channel.
• Single 10-bit D/A converter provide variable analog output.
• Two 32-bit timers/external event counters (with four capture and four compare (channels each), PWM unit (six outputs) and watchdog.
• Low power real-time clock with independent power and dedicated 32 kHz clock input [6].
• Multiple serial interfaces including two UARTs (16C550), two Fast I2C-buses
• (400 Kbit/s), SPI and SSP with buffering and variable data length capabilities.
• Vectored interrupt controller with configurable priorities and vector addresses.
• Up to 45 of 5 V tolerant fast general purpose I/O pins in a tiny 64 package.
• Up to nine edge or level sensitive external interrupt pins available.
• 60 MHz maximum CPU clock available from programmable on-chip PLL with settling time of 100 µs.
• On-chip integrated oscillator operates with an external crystal in range from 1 MHz to 30 MHz and with an external oscillator up to 50 MHz.
• Power saving modes include idle and Power-down.
• Individual enable/disable of peripheral functions as well as peripheral clock scaling for Additional power optimization.
• Processor wake-up from Power-down mode via external interrupt, USB, Brown-Out Detect (BOD) or Real-Time Clock (RTC).
ARM PIN DIAGRAM
Single power supply chip with Power-On Reset (POR) and BOD circuits:
• –CPU operating voltage range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V tolerant I/O pads.
Description
This family introduces a new line of low voltage devices with the foremost traditional advantage of all ARMLPC2148 namely, high computational performance and a rich feature set at an extremely competitive price point. This feature makes the ARMLPC2148 family a logical choice for many high performance applications where cost is a primary consideration.
Pin Name
|
Pin Direction
|
Pin description
|
X1
|
Input
|
Crystal Oscillator Input
- Input to the oscillator and internal clock
generator circuits
|
X2
|
Output
|
Crystal Oscillator Output
- Output from the oscillator amplifier
|
EINT0
|
Input
|
External Interrupt Input 0
- An active low/high level or falling/rising edge general purpose interrupt input. This pin may be
Used to wake up the processor from Idle or Power-down modes. Pins P0.1 and P0.16 can be selected to perform EINT0 function.
|
EINT1
|
Input
|
External Interrupt Input 1
- See the EINT0 description above. Pins P0.3 and P0.14 can be selected to perform EINT1 function.
|
EINT2
|
Input
|
External Interrupt Input 2
- See the EINT0 description above. Pins P0.7 and P0.15 can be selected to perform EINT2 function.
|
EINT3
|
Input
|
External Interrupt Input 3
- See the EINT0 description above. Pins P0.9, P0.20 and P0.30 can be selected to perform EINT3 function.
|
RESET
|
Input
|
External Reset input
- A LOW on this pin resets the chip, causing
I/O ports and peripherals to take on their default states, and the
processor to begin execution at address 0x0000 0000
|
Table 6.1: Pin Description of ARM
ARM 7TDMI-S Processor
The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high performance and very low power consumption. The ARM architecture is based on Reduced Instruction Set Computer (RISC) principles, and the instruction set and related decode mechanism are much simpler than those of micro programmed Complex Instruction Set Computers. This simplicity results in a high instruction throughput and impressive real-time interrupt response from a small and cost-effective processor core.
Pipeline techniques are employed so that all parts of the processing and memory systems can operate continuously. Typically, while one instruction is being executed, its successor is being decoded, and a third instruction is being fetched from memory [6].
The ARM7TDMI-S processor also employs a unique architectural strategy known as THUMB, which makes it ideally suited to high-volume applications with memory restrictions, or applications where code density is an issue.
THUMB code is able to provide up to 65% of the code size of ARM, and 160% of the performance of an equivalent ARM processor connected to a 16-bit memory system.
The ARM7TDMI-S processor is described in detail in the ARM7TDMI-S Datasheet that can be found on official ARM website [5].
Fig 6.2: Block Diagram Of ARM
Modes of Operation
ARM and Thumb are two different instruction sets supported by ARM cores with a “T” in their name. For instance, ARM7 TDMI supports Thumb mode. ARM instructions are 32 bits wide, and Thumb instructions are 16 wide. Thumb mode allows for code to be smaller, and can potentially be faster if the target has slow memory. Please consult documentation from your MCU vendor, or documentation from ARM, for additional information.
ARM Mode
The ARM 32-bit instruction set is the base 32-bit ISA used in the ARMv4T, ARMv5TEJ and ARMv6 architectures. In these architectures it is used in applications requiring high performance, or for handling hardware exceptions such as interrupts and processor start-up.
Condition Code
|
Meaning
|
N
|
Negative condition code, set to 1 if result is negative
|
Z
|
Zero condition code, set to 1 if the result of the instruction is 0
|
C
|
Carry condition code, set to 1 if the instruction results in a carry condition
|
V
|
Overflow condition code, set to 1 if the instruction results in an overflow condition.
|
Table 6.2: Condition codes
The ARM 32-bit ISA is also supported in the Cortex™-A and Cortex-R profiles of the Cortex architecture for performance critical applications, and for legacy code. Most of its functionality is subsumed into the Thumb-2 instruction set, which also benefits from improved code density.
ARM instructions are 32-bits wide, and are aligned on 4-byte boundaries.
All ARM instructions can also be "conditionalised" to only execute when previous instructions have set a particular condition code.
This means that instructions only have their normal effect on the programmers’ model operation, memory and coprocessors if the N, Z, C and V flags in the Application Program Status Register satisfy a condition specified in the instruction [5]. If the flags do not satisfy this condition, the instruction acts as a NOP, that is, execution advances to the next instruction as normal, including any relevant checks for exceptions being taken, but has no other effect. This conditionalisation of instructions allows small sections of if- and while-statements to be encoded without the use of branch instructions.
THUMB Mode
Essentially, the ARM7TDMI-S processor has two instruction sets: The standard 32-bit ARM, instruction set and a 16-bit THUMB instruction set. The THUMB set’s 16-bit instruction length means that a program will occupy lesser memory compared to 32-bit instruction set. It allows more code to occupy lesser memory. Most of the ARM’s performance advantage over a traditional 16-bit processor using 16-bit registers. This is possible because THUMB code operates on the same 32-bit register set as ARM code.
THUMB code is able to provide up to 65% of the code size of ARM, and 160% of the performance of an equivalent ARM processor connected to a 16-bit memory system.
TDMI refers to the following:
T: capable of executing the Thumb instruction Set
D: JTAG based on-chip debugging
M: Multiplier-And-Accumulate (MAC) unit required for DSP applications
I: Icebreakers debug module supporting hardware breakpoints and watch points, stalling the system for debugging
The ARMTDMI-S processor employs a unique architectural strategy knows as THUMB, Which makes it ideally suited to high-volume applications with memory restrictions or applications where code density is an issue.
Thumb’s Advantages
The major advantage of a 32-bit (ARM) architecture over a 16-bit architecture is its ability to manipulate 32-bit integers with single instructions, and to address a large address space efficiently.
When processing 32-bit data, a 16-bit architecture will take at least two instructions to perform the same task as a single ARM instruction. However, not all the code in a program will process 32-bit data and some instructions, like Branches, do not process any data at all.
0 comments:
Post a Comment